Secondary use of aspect ratio trapping holes as eDRAM structure

摘要

A semiconductor structure is provided according to a method in which an aspect ratio trapping process is employed. The structure includes a semiconductor substrate comprising a first semiconductor material having a first lattice constant. A first layer of second semiconductor material formed on the substrate, the first layer having a second lattice constant that is greater than the first lattice constant. A second layer of a semi-insulating, third semiconductor material is formed atop a top surface of the first layer. A transistor device is formed on top of the second layer. An eDRAM structure is connected electronically with a channel region of the transistor device, the eDRAM structure extending from the channel region of the transistor device to a sub-surface below a top surface of the semiconductor substrate.

主权项

1. A method of forming a semiconductor structure, the method comprising:
forming a plurality of sacrificial circular-shaped insulating pillar structures above a semiconductor substrate, the semiconductor substrate comprising a first semiconductor material having a first lattice constant; forming a second layer of a second semiconductor material above the substrate to surround and extend above top surfaces of the insulating pillar structures, the second semiconductor material having a second lattice constant that is greater than the first lattice constant; forming a third layer of semi-insulating, semiconductor layer of a third semiconductor material atop a surface of the second layer; forming a plurality of transistor devices above the third layer, each respective formed transistor device including a channel region having a portion in alignment with a top surface of a corresponding underlying insulating pillar structure of the plurality; forming a hole structure extending from a corresponding channel region of each transistor and through the third layer to expose a top surface of the corresponding underlying insulating pillar structure; through each the formed hole structure, removing each corresponding sacrificial insulating pillar structure; and forming an eDRAM device structure in each the corresponding removed sacrificial insulating pillar structure.