发明名称 Circuit and method for body biasing
摘要 Various example embodiments are directed to methods and circuits for mitigation of on-resistance variation and signal attenuation in transistors due to body effects. In some embodiments, an apparatus includes a transistor configured to provide a data signal from a first one of the source or the drain to the other one of the source or the drain in response to a control signal provided to the gate. A body bias circuit is configured to bias the body of the transistor based on a voltage of the data signal to reduce variation in the on-resistance exhibited by the first transistor. In an embodiment, the apparatus includes body bias transistors and switches and the gates of the body bias transistors are connected to protect the body bias transistors from the effects of electrostatic discharge (ESD) events.
申请公布号 US9264034(B2) 申请公布日期 2016.02.16
申请号 US201414328472 申请日期 2014.07.10
申请人 NXP B.V. 发明人 Kim Jong Koo
分类号 H01L29/66;H03K17/687 主分类号 H01L29/66
代理机构 代理人
主权项 1. An apparatus, comprising: a first transistor having a source, a drain, a gate, and a body, the first transistor configured and arranged to provide a data signal from a first one of the source or the drain to the other one of the source or the drain in response to a control signal provided to the gate, the first transistor being subject to attenuation of the data signal due to body effects; and a body bias circuit configured and arranged to bias the body of the first transistor based on a voltage of the data signal and to reduce attenuation of the data signal by the first transistor, wherein the body bias circuit includes: a second transistor having a source, a drain, and a gate and wherein the source and drain are connected between the body of the first transistor and the first one of the source or the drain of the first transistor; a third transistor having a source, a drain, and a gate and wherein the source and drain are connected between the body of the first transistor and the other one of the source or drain of the first transistor; the apparatus further including: a first switch connected between the second transistor and the first one of the source or the drain of the first transistor; a second switch connected between the third transistor and the other one of the source or the drain of the first transistor; wherein the gate of the second transistor is connected between the second switch and the third transistor and the gate of the third transistor is connected between the first switch and the second transistor.
地址 Eindhoven NL