Simultaneous formation of source/drain openings with different profiles

摘要

A method includes forming a first gate stack and a second gate stack over a first portion and a second portion, respectively, of a semiconductor substrate, masking the first portion of the semiconductor substrate, and with the first portion of the semiconductor substrate being masked, implanting the second portion of the semiconductor substrate with an etch-tuning element. The first portion and the second portion of the semiconductor substrate are etched simultaneously to form a first opening and a second opening, respectively, in the semiconductor substrate. The method further includes epitaxially growing a first semiconductor region in the first opening, and epitaxially growing a second semiconductor region in the second opening.

主权项

1. A method comprising:
forming a first gate stack and a second gate stack over a first portion and a second portion, respectively, of a semiconductor substrate; masking the first portion of the semiconductor substrate; with the first portion of the semiconductor substrate being masked, implanting the second portion of the semiconductor substrate with an etch-tuning element; simultaneously etching the first portion and the second portion of the semiconductor substrate to form a first opening and a second opening, respectively, in the semiconductor substrate, a first surface of the first opening proximate the first gate stack being a curved surface with more than one crystallographic plane, a second surface of the second opening proximate the second gate stack being a curved surface with more than one crystallographic plane, wherein during the simultaneously etching, portions of the semiconductor substrate implanted with the etch-tuning element have a higher lateral etching rate than portions of the semiconductor substrate un-implanted with the etch-tuning element, and the portions of the semiconductor substrate implanted with the etch-tuning element and the portions of the semiconductor substrate un-implanted with the etch-tuning element having a same vertical etching rate; epitaxially growing a first semiconductor region in the first opening; and epitaxially growing a second semiconductor region in the second opening.