发明名称 半導体ウェーハの評価方法及び製造方法
摘要 A semiconductor-wafer evaluation method includes: before the mirror-polishing step, measuring warp data of displacement of the surface of the semiconductor wafer with a capacitive shape measurement device; setting a prescribed width of an outer circumferential portion of the semiconductor wafer as a sampling range; performing fitting of the warp data within the sampling range with a fitting function in a predetermined fitting range; calculating a difference (Range) between a maximum and a minimum of the warp data after the fitting within the sampling range; and, after the mirror-polishing step, evaluating the nanotopography of the surface of the semiconductor wafer on the basis of the calculated difference (Range).
申请公布号 JP5862492(B2) 申请公布日期 2016.02.16
申请号 JP20120153933 申请日期 2012.07.09
申请人 信越半導体株式会社 发明人 清水 裕一
分类号 H01L21/304;H01L21/66 主分类号 H01L21/304
代理机构 代理人
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