发明名称 |
Memory cell with integrated III-V device |
摘要 |
A method including forming an oxide layer on a top of a substrate; forming a deep trench capacitor in the substrate; bonding a III-V compound semiconductor to a top surface of the oxide layer; and forming a III-V device in the III-V compound semiconductor. |
申请公布号 |
US9263512(B2) |
申请公布日期 |
2016.02.16 |
申请号 |
US201313924986 |
申请日期 |
2013.06.24 |
申请人 |
GLOBALFOUNDRIES INC. |
发明人 |
Leobandung Effendi |
分类号 |
H01L49/02;H01L27/108;H01L29/66;H01L29/94 |
主分类号 |
H01L49/02 |
代理机构 |
Scully, Scott, Murphy & Presser, P.C. |
代理人 |
Scully, Scott, Murphy & Presser, P.C. |
主权项 |
1. A method comprising:
forming an oxide layer on a top surface of a substrate; forming a deep trench through the oxide layer and into the substrate; forming a buried plate of a deep trench capacitor by doping sidewalls of the substrate exposed within the deep trench using an ion implantation technique, the oxide layer remains and protects a top surface of the substrate from being doped by the ion implantation; forming a node dielectric along sidewalls and a bottom of the deep trench; forming an inner electrode on top of the node dielectric within the deep trench; forming an opening by recessing the node dielectric and the inner electrode; and forming a dielectric cap by filling the opening with a dielectric material such that a top surface of the dielectric cap is substantially flush with the top surface of the oxide layer, and bonding a III-V compound semiconductor to a top surface of the oxide layer, wherein the dielectric cap is in direct contact with the III-V compound semiconductor. |
地址 |
Grand Cayman KY |