发明名称 Live error recovery
摘要 A packet is identified at a port of a serial data link, and it is determined that the packet is associated with an error. Entry into an error recovery mode is initiated based on the determination that the packet is associated with the error. Entry into the error recovery mode can cause the serial data link to be forced down. In one aspect, forcing the data link down causes all subsequent inbound packets to be dropped and all pending outbound requests and completions to be aborted during the error recovery mode.
申请公布号 US9262270(B2) 申请公布日期 2016.02.16
申请号 US201313892894 申请日期 2013.05.13
申请人 Intel Corporation 发明人 Jayaprakash Bharadwaj Prahladachar;Brown Alexander;Das Sharma Debendra;Thaliyil Junaid
分类号 G06F11/16;G06F11/14;G06F11/07 主分类号 G06F11/16
代理机构 Patent Capital Group 代理人 Patent Capital Group
主权项 1. An apparatus comprising: error logic, implemented at least in part in hardware circuitry, to: identify a packet at a port of a serial data link;receive an error code corresponding to the packet;determine, from the error code, that the packet is associated with an error of a particular severity level, wherein errors of the particular severity level are to be handled using an error recovery mode;determine that the severity level of the error is to be changed from the particular severity level to a lower severity level, wherein errors of the lower severity level are to be corrected in lieu of entry into the error recovery mode; andinitiate entry into the error recovery mode for another error of the particular severity level, wherein entry into the error recovery mode is to cause the corresponding serial data link to be forced down.
地址 Santa Clara CA US