| 摘要 |
A quick-start digital output buffer and a control method therefor. The digital output buffer comprises a time sequence generator (1), a capacitor mismatch detector (2), a capacitor array controller (3), a switched capacitor array (4), a current detector (5), an inductor L, a load capacitor CL, a first switch tube SW1, a second switch tube SW2, a third switch tube SW3, a fourth switch tube SW4 and a fifth switch tube SW5, wherein the time sequence generator (1), the switched capacitor array (4), the inductor L, the load capacitor CL, the first switch tube SW1, the second switch tube SW2, the third switch tube SW3, the fourth switch tube SW4 and the fifth switch tube SW5 form a main circuit, the current detector (5) provides negative feedback for the main circuit, and the capacitor mismatch detector (2) and the capacitor array controller (3) form a control circuit for quickly starting the switched capacitor array. The digital output buffer is reduced in power consumption, can be quickly started, and has a quick response capacity to variation of the load capacitor. |
