INTEGRATED OXIDE AND SI ETCH FOR 3D CELL CHANNEL MOBILITY IMPROVEMENTS

摘要

Methods of forming single crystal channel material in a 3-d flash memory cell using only gas-phase etching techniques are described. The methods include gas-phase etching native oxide from a polysilicon layer on a conformal ONO layer. The gas-phase etch also removes native oxide from the exposed single crystal silicon substrate the bottom of a 3-d flash memory hole. The polysilicon layer is removed, also with a gas-phase etch, on the same substrate processing mainframe. Both native oxide removal and polysilicon removal use remotely excited fluorine-containing apparatuses attached to the same mainframe to facilitate performing both operations without an intervening atmospheric exposure. Epitaxial silicon is then grown from the exposed single crystal silicon to create a high mobility replacement channel.

主权项

1. A method of forming a 3-d flash memory cell, the method comprising:
transferring a patterned substrate into a substrate processing mainframe, wherein the patterned substrate comprises a vertical stack of alternating silicon oxide and silicon nitride slabs and a conformal ONO layer overlying the vertical stack, wherein the conformal ONO layer comprises a first silicon oxide layer, a silicon nitride layer and a second silicon oxide layer, and wherein a polysilicon layer overlies the conformal ONO layer; transferring the patterned substrate into a first substrate processing chamber mounted on the substrate processing mainframe; flowing a first fluorine-containing precursor into a first remote plasma region within the first substrate processing chamber while striking a plasma to form first plasma effluents from the fluorine-containing precursor; flowing the first plasma effluents into a first substrate processing region within the first substrate processing chamber; wherein the first substrate processing region houses the patterned substrate; reacting the first plasma effluents with the polysilicon layer to remove a polysilicon native oxide and with an exposed single crystal silicon portion at the bottom of the vertical memory hole to remove a single crystal silicon native oxide; transferring the patterned substrate without breaking vacuum from the first substrate processing chamber to a second substrate processing chamber mounted on the substrate processing mainframe; flowing a second fluorine-containing precursor into a second remote plasma region within the second substrate processing chamber while striking a plasma to form second plasma effluents and flowing the second plasma effluents through a showerhead into a second substrate processing region housing the patterned substrate within the second substrate processing chamber; reacting the second plasma effluents with the polysilicon layer to remove the polysilicon layer; transferring the patterned substrate without breaking vacuum from the second substrate processing chamber to a third substrate processing chamber mounted on the substrate processing mainframe; growing epitaxial silicon in the third substrate processing chamber from the exposed single crystal silicon portion to fill the memory hole; and removing the patterned substrate from the substrate processing mainframe.