| 发明名称 |
RESISTIVE MEMORY DEVICE AND OPERATING METHOD THEREOF |
| 摘要 |
A resistive memory device includes a memory cell array that includes a plurality of memory layers stacked in a vertical direction. Each of the plurality of memory layers includes a plurality of memory cells disposed in regions where a plurality of first lines and a plurality of second lines cross each other. A bad region management unit defines as a bad region a first memory layer including a bad cell from among the plurality of memory cells and at least one second memory layer. |
| 申请公布号 |
US2016042811(A1) |
申请公布日期 |
2016.02.11 |
| 申请号 |
US201514743521 |
申请日期 |
2015.06.18 |
| 申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KWON HYO-JIN;BYEON DAE-SEOK;LEE YEONG-TAEK;YOON CHI-WEON;LEE YONG-KYU;PARK HYUN-KOOK |
| 分类号 |
G11C29/00;G11C29/44;G11C13/00 |
主分类号 |
G11C29/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A resistive memory device comprising:
a memory cell array comprising a plurality of memory layers stacked in a vertical direction, wherein each of the plurality of memory layers comprises a plurality of memory cells disposed in regions where a plurality of first lines and a plurality of second lines cross each other, and a bad region management unit that defines as a bad region a first memory layer comprising a bad cell from among the plurality of memory cells and at least one second memory layer. |
| 地址 |
Suwon-si KR |
