| 摘要 |
A memory access request is issued by processing circuitry 12, 50, 55 of a data processing apparatus and specifies a virtual address for a data item. Address translation circuitry 14, 60 performs address translation with reference to a descriptor provided by a page table and produces a modified memory access request specifying a physical address for the data item. The address translation circuitry includes page table walk circuitry 18, 64 which generates a page table walk request to retrieve the descriptor. Walk ahead circuitry 35, located between the address translation circuitry and a memory device 40 containing the page table 45, comprises detection circuitry used to detect a memory page table walk request generated by the page table walk circuitry for a descriptor in a page table. The walk ahead circuitry has request generation circuitry which generates a prefetch memory request for data from the memory device at a physical address determined with reference to the descriptor requested by the detected memory page table walk request. This prefetched data may be another descriptor required as part of the address translation process, or may be the actual data item being requested by the processing circuitry. |
