发明名称 On-chip interconnects with reduced capacitance and method of fabrication thereof
摘要 An electronics interconnection system is provided with reduced capacitance between a signal line and the surrounding dielectric material. By using a non-homogenous dielectric, the effective dielectric loss of the material is reduced. This reduction results in less power loss from the signal line to the dielectric material, which reduces the number of buffers needed on the signal line. This increases the speed of the signal, and reduces the power consumed by the interconnection system. The fabrication techniques provided are advantageous because they can be fabricated using today's standard IC fabrication techniques.
申请公布号 US9257406(B2) 申请公布日期 2016.02.09
申请号 US201414269117 申请日期 2014.05.03
申请人 Banpil Photonics, Inc. 发明人 Dutta Achyut Kumar
分类号 H05K1/11;H01L23/00;H01L23/473;H01L23/522;H01L23/532;H01L21/768;H01L21/3105;H01L21/321 主分类号 H05K1/11
代理机构 代理人
主权项 1. A high speed electronics interconnection system for interconnecting two or more on-chip electronic elements, the interconnection system comprising: at least one electrical signal plane comprising at least one signal conductor for carrying an electrical signal along an xy-plane, wherein said xy-plane is a horizontal plane defined by Cartesian coordinates along the X and Y axes, such that height coordinate of said xy-plane is measured along vertical Z, andwherein said at least one signal conductor has a length that is significantly larger than either its height or width at any point along its length; at least one first dielectric system such that one side of the at least one electrical signal plane is laid on the first dielectric system, the first dielectric system comprising: at least one dielectric layer, andat least one first open trench embedded in the at least one dielectric layer, wherein each said at least one first open trench is grouped with one of said at least one signal conductor,wherein said at least one first open trench has a length that is significantly larger than either its height or width at any point along its length,wherein said at least one first open trench may be continuous or interrupted,wherein said at least one first open trench has a length that is either the same as the length of the said at least one signal conductor to which it is grouped, or has a length that is shorter than the length of the said at least one signal conductor to which it is grouped,wherein each said at least one first open trench runs parallel with and directly above and/or below the at least one signal conductor with which said at least one first open trench is grouped, such that the xy-coordinates of the width of said at least one first open trench at any point along its length substantially match or overlap with the xy-coordinates of the width of said at least one signal conductor, andwherein each said at least one first open trench is located in close proximity to the at least one signal conductor with which said at least one first open trench is grouped, such that dielectric loss across said at least one signal conductor is reduced; and at least one signal via connected to the at least one signal conductor.
地址 Santa Clara CA US