发明名称 |
Leadframe-based system-in-packages having sidewall-mounted surface mount devices and methods for the production thereof |
摘要 |
Embodiments of a method for fabricating System-in-Packages (SiPs) are provided, as are embodiments of a SiP. In one embodiment, the method includes producing a first package including a first molded package body having a sidewall. A first leadframe is embedded within the first molded package body and having a first leadframe lead exposed through the sidewall. In certain implementations, a semiconductor die may also be encapsulated within the first molded package body. A Surface Mount Device (SMD) is mounted to the sidewall of the first molded package body such that a first terminal of the SMD is in ohmic contact with the first leadframe lead exposed through the sidewall. |
申请公布号 |
US9257419(B2) |
申请公布日期 |
2016.02.09 |
申请号 |
US201414216690 |
申请日期 |
2014.03.17 |
申请人 |
FREESCALE SEMICONDUCTOR INC. |
发明人 |
Yap Weng F. |
分类号 |
H01L23/495;H01L25/16;H01L23/12;H01L25/18;H01L23/00;H05K1/18;H05K1/02;H01L21/56;H01L23/538;H01L25/10;H01L23/498 |
主分类号 |
H01L23/495 |
代理机构 |
Ingrassia Fisher & Lorenz, P.C. |
代理人 |
Ingrassia Fisher & Lorenz, P.C. |
主权项 |
1. A method for fabricating a System-In-Package, comprising:
providing a first package comprising a first leadframe embedded within a first molded package body, the first leadframe having a first leadframe lead exposed through a first sidewall of the first molded package body; bonding the first package to a second package in a stacked configuration, the second package comprising a second leadframe embedded within a second molded package body, the second leadframe having a second leadframe lead exposed through a second sidewall of the second molded package body; mounting a Surface Mount Device (SMD) to the first and second sidewalls such that a first terminal of the SMD is in ohmic contact with the first leadframe lead and a second terminal of the SMD is in ohmic contact with the second leadframe lead; wherein the SMD is selected from the group consisting of a discrete two terminal resistor providing a known resistance between the first and second leadframe leads, a discrete two terminal capacitor providing a known capacitance between the first and second leadframe leads, and a discrete two terminal inductor providing a known inductance between the first and second leadframe leads. |
地址 |
Austin TX US |