发明名称 Semiconductor device
摘要 A semiconductor device is reduced in size. The semiconductor device includes a die pad, a plurality of leads arranged around the die pad, a memory chip and a power source IC chip mounted over the die pad, a logic chip mounted over the memory chip, a plurality of down bonding wires for connecting the semiconductor chip to the die pad, a plurality of lead wires for connecting the semiconductor chip to leads, and a plurality of inter-chip wires. Further, the logic chip is arranged at the central part of the die pad in a plan view, and the power source IC chip is arranged in a corner part region of the die pad in the plan view. This reduces the size of the QFN.
申请公布号 US9257371(B2) 申请公布日期 2016.02.09
申请号 US201514645899 申请日期 2015.03.12
申请人 Renesas Electronics Corporation 发明人 Imura Chikako;Kanemoto Koichi
分类号 H01L23/495;H01L23/00 主分类号 H01L23/495
代理机构 Mattingly & Malur, PC 代理人 Mattingly & Malur, PC
主权项 1. A semiconductor device, comprising: (a) a die pad including: a first surface, a second surface opposite to the first surface, a first side surface located between the first surface and the second surface, a second side surface located between the first surface and the second surface, and opposite to the first side surface, and a first step part protruding from the first side surface; (b) a first component mounted on the die pad, and also arranged on the first surface of the die pad; (c) a second component mounted on the die pad, and also arranged on the first step part; and (d) a sealing body sealing the first component and the second component such that the sealing body exposes the second surface of the die pad and covers the first step part, wherein the second component is spaced from the first component in a plan view, and arranged side-by-side with the first component along a first direction extending from the second side surface toward the first side surface.
地址 Tokyo JP