Duty cycle correction circuit and operation method thereof

摘要

A duty cycle correction circuit includes a clock adjustment unit configured to adjust a duty ratio of an input clock signal in response to a duty control signal and generate an output clock signal, a tracking type setting unit configured to generate an tracking type selection signal for setting a first or second tracking type based on a duty locking state of the output clock signal, and a control signal generation unit configured to generate the duty control signal, into which the first or second tracking type is incorporated, in response to the tracking type selection signal and the output clock signal.

主权项

1. An operating method of a duty cycle correction circuit, the operating method comprising:
determining whether an initial locking is completed; performing a first locking operation for correcting a duty ratio of a clock signal at a first target duty ratio in response to a duty control signal generated by using a first tracking type based on a result of the determining step; performing a second locking operation for correcting the duty ratio of the clock signal at a second target duty ratio in response to the duty control signal generated by using a second tracking type based on the result of the determining step; and selecting one of the first locking operation and the second locking operation corresponding to the result of the determining step, wherein the first tracking type comprises a successive approximation register (SAR) tracking type, and the second tracking type comprises a linear tracking type.