Shift register unit, shift register, gate drive circuit and display apparatus

摘要

To provide a shift register unit, which comprises a positive control signal input terminal, a reverse control signal input terminal, a first thin film transistor, a second thin film transistor, a positive input terminal, a reverse input terminal, a pull-up module and a first reset module, a gate of the first thin film transistor is connected with the positive input terminal, a first electrode of the first thin film transistor is connected with the positive control signal input terminal, a second electrode of the first thin film transistor is connected with a pull-up node of the pull-up module, a gate of the second thin film transistor is connected with the reverse input terminal, a first electrode of the second thin film transistor is connected with the pull-up node of the pull-up module, a second electrode of the second thin film transistor is connected with the reverse control signal input terminal.

主权项

1. A shift register unit, characterized in that, comprising a positive control signal input terminal, a reverse control signal input terminal, a first thin film transistor, a second thin film transistor, a positive input terminal, a reverse input terminal, a pull-up module and a first reset module, a gate of the first thin film transistor is connected with the positive input terminal, a first electrode of the first thin film transistor is connected with the positive control signal input terminal, a second electrode of the first thin film transistor is connected with a pull-up node of the pull-up module, a gate of the second thin film transistor is connected with the reverse input terminal, a first electrode of the second thin film transistor is connected with the pull-up node of the pull-up module, a second electrode of the second thin film transistor is connected with the reverse control signal input terminal, wherein:
during a positive scanning, a high level signal is inputted from the positive control signal input terminal, and a low level signal is inputted from the reverse control signal input terminal,
during a pre-charging phase of the positive scanning, a high level signal is inputted from the positive input terminal, and a low level signal is inputted from the reverse input terminal,during a reset phase of the positive scanning, a high level signal is inputted from the reverse input terminal; and during a reverse scanning, a low level signal is inputted from the positive control signal input terminal, and a high level signal is inputted from the reverse control signal input terminal,
during a pre-charging phase of the reverse scanning, a high level signal is inputted from the reverse input terminal, and a low level signal is inputted from the positive input terminal,during a reset phase of the reverse scanning, a high level signal is inputted from the positive input terminal.