Semiconductor device and method of fabricating the same

摘要

A semiconductor device is provided. The semiconductor includes a plurality of interlayer insulating layers and a plurality of gate electrodes alternately stacked in a first direction on a substrate. The plurality of interlayer insulating layers and the plurality of gate electrodes constitute a side surface extended in the first direction. A gate dielectric layer is disposed on the side surface. A channel pattern is disposed on the gate dielectric layer. The gate dielectric layer includes a protective pattern, a charge trap layer, and a tunneling layer. The protective pattern includes a portion disposed on a corresponding gate electrode of the plurality of gate electrodes. The charge trap layer is disposed on the protective pattern. The tunneling layer is disposed between the charge trap layer and the channel pattern. The protective pattern is denser than the charge trap layer.

主权项

1. A semiconductor device comprising:
a substrate; a stack structure including a plurality of interlayer insulating layers and a plurality of gate electrodes alternately stacked on the substrate; a through-hole vertically penetrating the stack structure and exposing a portion of the substrate; and a vertical structure filling the through-hole, wherein the vertical structure includes a gapfill pattern formed at a center of the through-hole, a channel pattern wrapping an outer surface of the gapfill pattern and being in contact with the exposed portion of the substrate, wherein the channel pattern is formed of a semiconductor material and a gate dielectric layer wrapping an outer surface of the channel pattern, and the gate dielectric layer includes a tunneling layer in contact with the channel pattern, a charge trap layer in contact with the tunneling layer, a barrier layer in contact with the charge trap layer, a protective pattern in contact with the barrier layer and denser than the barrier layer, and a blocking layer in contact with the protective pattern and a corresponding gate electrode of the plurality of gate electrodes, wherein the protective pattern includes a first portion interposed between two adjacent interlayer insulating layers of the plurality of interlayer insulating layers and includes a second portion on each of the interlayer insulating layers, wherein a thickness of the first portion is greater than a thickness of the second portion.