发明名称 Synchronized debug information generation
摘要 In an approach for determining a location of failure between interconnects/controller, a computer collects debug information simultaneously at a plurality of nodes coupled to an interconnect. Subsequent to collecting debug information, the computer analyzes the debug information collected simultaneously thereby determining which end of the interconnect caused the failure.
申请公布号 US9256489(B2) 申请公布日期 2016.02.09
申请号 US201314066722 申请日期 2013.10.30
申请人 International Business Machines Corporation 发明人 Mahajan Ajay K.;Sainath Venkatesh;Subbanna Vishwanatha
分类号 G06F11/07 主分类号 G06F11/07
代理机构 代理人 McCarthy Maeve
主权项 1. A computer program product for determining a location of failure between interconnects/controller, the computer program product comprising: one or more computer-readable storage device and program instructions stored on the one or more computer-readable storage device, the stored program instructions comprising: program instructions to collect debug information simultaneously at a plurality of nodes coupled to an interconnect; and program instructions to analyze the debug information collected simultaneously thereby determining which end of the interconnect caused the failure.
地址 Armonk NY US