发明名称 Low consumption logic circuit with mechanical switches
摘要 Adiabatic logic circuit having a first and a second inputs, a first and a second outputs and at least one supply and synchronization input (Phi), with this circuit comprising: a first logic device comprising at least one first microelectromechanical and/or nanoelectromechanical switch, referred to as first mechanical switch, controlled by a first input and connected to the first output and to the supply and synchronization input,a second logic device opposite the first logic device comprising at least one second microelectromechanical or nanoelectromechanical switch, referred to as second mechanical switch, controlled by the second input and connected to the second output and to the supply and synchronization input,first and second devices for partial discharging connected respectively between the first output and the supply and synchronization input and between the second output and the supply and synchronization input.
申请公布号 US9257981(B2) 申请公布日期 2016.02.09
申请号 US201414452698 申请日期 2014.08.06
申请人 Commissariat à l ' énergie atomique et aux énergies alternatives 发明人 Fanet Herve;Belleville Marc
分类号 H03K19/00;B81B7/02 主分类号 H03K19/00
代理机构 Oblon, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, McClelland, Maier & Neustadt, L.L.P.
主权项 1. Adiabatic logic circuit having at least one first and one second inputs, one first and one second outputs, and at least one supply and synchronisation input, with the adiabatic logic circuit comprising: a first logic device comprising at least one first microelectromechanical and/or nanoelectromechanical switch, referred to as first logic switch, at least partially controlled by the first input and connected to the first output and to the supply and synchronisation input; a second logic device referred to as complementary providing a complementary logic function of the first logic device comprising at least one second microelectromechanical and/or nanoelectromechanical switch, referred to as second logic switch, at least partially controlled by the second input and connected to the second output and to the supply and synchronisation input; and first and second devices for discharging connected respectively between the first output and the supply and synchronisation input and between the second output and the supply and synchronisation input, said first and second devices for discharging configured to provide a discharge at least partially of the first and second outputs, said first and second devices for discharging comprising respectively at least one switch, wherein the first logic device and the second logic device are directly connected to the supply and synchronisation input.
地址 Paris FR