CACHE MANAGEMENT FOR NONVOLATILE MAIN MEMORY

摘要

A coherence logic of a first core in a multi-core processor receives a request to send a cache line to a second core in the multi-core processor. In response to receiving the request, the coherence logic determines if the cache line is associated to a logically nonvolatile virtual page mapped to a nonvolatile physical page in a nonvolatile main memory. If so, the coherence logic flushes the cache line from the cache to the nonvolatile main memory and then sends the cache line to the second core.