发明名称 MEMORY CONTROLLER AND METHOD FOR CONTROLLING A MEMORY DEVICE TO PROCESS ACCESS REQUESTS ISSUED BY AT LEAST ONE MASTER DEVICE
摘要 A memory controller and method are provided for controlling a memory device to process access requests issued by at least one master device, the memory device having a plurality of access regions. The memory controller has a pending access requests storage that buffers access requests that have been issued by a master device prior to those access requests being processed by the memory device. Access control circuitry then issues control commands to the plurality of access regions in order to control the memory device to process access requests retrieved from the pending access requests storage. A query structure is also provided that is configured to maintain, for each access region, information about the buffered access requests in the pending access requests storage, and the access control circuitry references the query structure when determining the control commands to be issued to the plurality of access regions. Such an approach enables significant performance and energy savings to be realized in control of the memory device, without requiring the contents of the pending access requests storage to be directly monitored by the access control circuitry.
申请公布号 US2016034406(A1) 申请公布日期 2016.02.04
申请号 US201414449689 申请日期 2014.08.01
申请人 ARM Limited 发明人 HANSSON Andreas;UDIPI Aniruddha Nagendran;AGARWAL Neha
分类号 G06F13/18;G11C7/10;G06F13/16 主分类号 G06F13/18
代理机构 代理人
主权项 1. A memory controller comprising: a pending access requests storage configured to buffer access requests issued by at least one master device prior to those access requests being processed by a memory device; access control circuitry configured to issue control commands to a plurality of access regions in the memory device, in order to control the memory device to process access requests retrieved from the pending access requests storage; a query structure configured to maintain, for each access region, information about the buffered access requests in the pending access requests storage; and the access control circuitry being configured to reference the query structure when determining the control commands to be issued to the plurality of access regions.
地址 Cambridge GB
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