发明名称 Method Of Manufacturing Semiconductor Device And Semiconductor Device Having Unequal Pitch Vertical Channel Transistors
摘要 A semiconductor device comprises a set of selection transistors, such as in a three-dimensional memory structure or stack having resistance change memory cells arranged along vertical bit lines. Each selection transistor has a non-shared control gate and a shared control gate. The transistor bodies may have an unequal pitch and a common height. Some of the transistor bodies can be misaligned with the vertical bit lines to fit the transistors to the stack. A method for programming the three-dimensional memory structure includes forming one or two channels in a transistor body to provide a current to selected memory cells. Programming can initially use one channel and subsequently use two channels based on a programming progress. A method for fabricating a semiconductor device includes etching a gate conductor material so that shared and non-shared control gates have a common height.
申请公布号 US2016035789(A1) 申请公布日期 2016.02.04
申请号 US201414449417 申请日期 2014.08.01
申请人 SANDISK 3D LLC 发明人 Mine Teruyuki
分类号 H01L27/24;H01L23/528;H01L21/8234;H01L21/768;G11C13/00;H01L45/00 主分类号 H01L27/24
代理机构 代理人
主权项 1. A semiconductor device, comprising: a substrate; a first horizontal bit line on the substrate; a three-dimensional memory structure above the first horizontal bit line, the three-dimensional memory structure comprising first and second vertical bit lines, memory cells arranged along the first vertical bit line and memory cells arranged along the second vertical bit line; a first selection transistor arranged between the first horizontal bit line and the first vertical bit line, the first selection transistor comprises a first vertical channel transistor body, a first control gate and a second control gate, and the first control gate is not shared with any other vertical channel transistor body which is arranged along the first horizontal bit line; and a second selection transistor arranged between the first horizontal bit line and the second vertical bit line, the second selection transistor comprises a second vertical channel transistor body, the second control gate as a shared control gate which is shared with the first selection transistor, and a third control gate, the third control gate is not shared with any other vertical channel transistor body which is arranged along the first horizontal bit line.
地址 Milpitas CA US