INTEGRATED BIT-LINE AIRGAP FORMATION AND GATE STACK POST CLEAN

摘要

Methods of forming flash memory cells are described which incorporate air gaps for improved performance. The methods are useful for so-called “2-d flat cell” flash architectures. 2-d flat cell flash memory involves a reactive ion etch to dig trenches into multi-layers containing high work function and other metal layers. The methods described herein remove the metal oxide debris from the sidewalls of the multi-layer trench and then, without breaking vacuum, selectively remove shallow trench isolation (STI) oxidation which become the air gaps. Both the metal oxide removal and the STI oxidation removal are carried out in the same mainframe with highly selective etch processes using remotely excited fluorine plasma effluents.

主权项

1. A method of forming a flash device, the method comprising:
transferring a patterned substrate into a substrate processing mainframe, wherein the patterned substrate comprises a stack of materials including a control gate layer over a block layer over a charge trap layer over a protective liner over a polysilicon layer, and wherein a trench has been etched through each layer and a sidewall of the trench has metal-oxide residue left over from a reactive-ion etch process used to create the trench; transferring the patterned substrate into a first substrate processing chamber mounted on the substrate processing mainframe and flowing a fluorine-containing precursor into a first remote plasma region within the first substrate processing chamber while striking a plasma to form first plasma effluents and flowing the first plasma effluents through a showerhead into a substrate processing region housing the patterned substrate within the first substrate processing chamber; reacting the first plasma effluents with a shallow trench isolation silicon oxide to selectively remove a portion of the shallow trench isolation silicon oxide to form a pocket for an air gap between two adjacent polysilicon gates; flowing a fluorine-containing precursor into the first remote plasma region while striking a plasma to form second plasma effluents; flowing the second plasma effluents into the substrate processing region housing the patterned substrate, and reacting the second plasma effluents with the metal-oxide residue to selectively remove the metal-oxide residue from the sidewall of the trench; and removing the patterned substrate from the substrate processing mainframe, wherein the patterned substrate is not exposed to atmosphere between transferring the patterned substrate into the substrate processing mainframe and removing the patterned substrate from the substrate processing mainframe.