UNIT ARRAY OF A MEMORY DEVICE, MEMORY DEVICE, AND MEMORY SYSTEM INCLUDING THE SAME

摘要

A memory device includes a memory array including a plurality of sections, each including a plurality of memory cells and at least one reference cell. The memory device may also include a plurality of sense amplifier circuits respectively corresponding to the plurality of sections, and a plurality of switch circuits, each switch circuit connected between a respective section and sense amplifier circuit. Each switch circuit may be configured to select between communicatively connecting a first column of memory cells or a reference cell to a corresponding sense amplifier.

主权项

1. A memory device, comprising:
a unit array of memory cells, the unit array including 2n columns of memory cells and a plurality of reference cells, n being an integer greater than 1; a first memory cell region of the unit array including a first set of columns of memory cells, each column connected to a respective bit line; a first reference cell region of the unit array including at least a first reference cell; a first line selectively connected through a plurality of first switches to the first set of columns of memory cells and to the first reference cell; a second memory cell region of the unit array including a second set of columns of memory cells, each column connected to a respective bit line; a second reference cell region of the unit array including at least a second reference cell; a second line selectively connected through a plurality of second switches to the second set of columns of memory cells and to the second reference cell; a third memory cell region of the unit array including a third set of columns of memory cells, each column connected to a respective bit line; a third reference cell region of the unit array including at least a third reference cell; a third line selectively connected through a plurality of third switches to the third set of columns of memory cells and to the third reference cell; and a sense amplifier electrically connected to the first line, the second line, and the third line, wherein the sense amplifier is configured to provide read data based on an output from the first line, the second line, and the third line.