发明名称 Methods and Apparatus for bump-on-trace Chip Packaging
摘要 Methods and apparatuses for a attaching a first substrate to a second substrate are provided. In some embodiments, a first substrate has a protective layer, such as a solder mask, around a die attach area, at which a second substrate is attached. A keep-out region (e.g., an area between the second substrate and the protective layer) is a region around the second substrate in which the protective layer is not formed or removed. The keep-out region is sized such that a sufficient gap exists between the second substrate and the protective layer to place an underfill between the first substrate and the second substrate while reducing or preventing voids and while allowing traces in the keep-out region to be covered by the underfill.
申请公布号 US2016035591(A1) 申请公布日期 2016.02.04
申请号 US201514883375 申请日期 2015.10.14
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Huang Chang-Chia;Chen Chen-Shien;Wu Sheng-Yu;Kuo Tin-Hao;Lin Yen-Liang
分类号 H01L21/56;H01L23/00 主分类号 H01L21/56
代理机构 代理人
主权项 1. A method of forming a semiconductor device, the method comprising: attaching a first substrate to a die attach region of a second substrate, the second substrate having traces formed thereon, the second substrate having a keep-out region around a periphery of the die attach region, and a periphery region around a periphery of the keep-out region, the second substrate having a protective layer overlying the traces in the periphery region, an area of the keep-out region being between about 5% and about 18% of an area of the first substrate; and forming an underfill interposed between the first substrate and the second substrate, the underfill extending over the traces located in the keep-out region.
地址 Hsin-Chu TW