发明名称 SEMICONDUCTOR STRUCTURE INCLUDING A FERROELECTRIC TRANSISTOR AND METHOD FOR THE FORMATION THEREOF
摘要 An illustrative semiconductor structure described herein includes a substrate including a logic transistor region, a ferroelectric transistor region and an input/output transistor region. A logic transistor is provided at the logic transistor region. The logic transistor includes a gate dielectric and a gate electrode. An input/output transistor is provided at the input/output transistor region. The input/output transistor includes a gate dielectric and a gate electrode. The gate dielectric of the input/output transistor has a greater thickness than the gate dielectric of the logic transistor. A ferroelectric transistor is provided at the ferroelectric transistor region. The ferroelectric transistor includes a ferroelectric dielectric and a gate electrode. The ferroelectric dielectric is arranged between the ferroelectric transistor region and the gate electrode of the ferroelectric transistor.
申请公布号 US2016035856(A1) 申请公布日期 2016.02.04
申请号 US201414445893 申请日期 2014.07.29
申请人 GLOBALFOUNDRIES Inc. 发明人 van Bentum Ralf;Yun Jongsin;Seo Seunghwan;Schmid Joerg
分类号 H01L29/51;H01L21/28;H01L27/088 主分类号 H01L29/51
代理机构 代理人
主权项 1. A semiconductor structure, comprising: a substrate comprising a logic transistor region, a ferroelectric transistor region and an input/output transistor region; a logic transistor provided at said logic transistor region, said logic transistor comprising a gate dielectric and a gate electrode; an input/output transistor provided at said input/output transistor region, said input/output transistor comprising a gate dielectric and a gate electrode, said gate dielectric of said input/output transistor having a greater thickness than said gate dielectric of said logic transistor; and a ferroelectric transistor provided at said ferroelectric transistor region, said ferroelectric transistor comprising a ferroelectric dielectric and a gate electrode, said ferroelectric dielectric being arranged between said ferroelectric transistor region and said gate electrode of said ferroelectric transistor.
地址 Grand Cayman KY