Power Semiconductor Device

摘要

A semiconductor device includes an active region and a semiconductor substrate layer having a lower part semiconductor layer of a second conductivity type. The active region includes a drift region formed by at least a part of the substrate layer, a body region of the second conductivity type formed on at least a part of the drift region, a source region of a first conductivity type disposed in the body region, and a first doped region of the first conductivity type at least partially disposed under the body region. A groove extends downward from a top of the substrate layer and contains a shielding electrode. A depth of the groove is greater than that of the first doped region. A gate at least partially formed above at least a part of the source region and the body region is electrically insulated from the shielding electrode.

主权项

1. A power semiconductor device, comprising:
a semiconductor substrate layer having a lower part semiconductor layer of a second conductivity type; and an active region which comprises:
a drift region formed by at least a part of the semiconductor substrate layer;a body region of the second conductivity type formed on at least a part of the drift region;a source region of a first conductivity type disposed in the body region;a first doped region of the first conductivity type at least partially disposed under the body region, a doping concentration of the first doped region being higher than that of the semiconductor substrate layer;an emitter electrode connected to the source region;a groove extending downward from a top of the semiconductor substrate layer and containing a shielding electrode, the shielding electrode being connected to the emitter electrode, wherein a depth of the groove in the substrate layer is greater than that of the first doped region; anda gate at least partially formed above at least a part of the source region and the body region and electrically insulated from the shielding electrode,wherein the semiconductor substrate layer is in direct contact with an insulation layer arranged on the semiconductor substrate layer.