Lithography Using High Selectivity Spacers for Pitch Reduction

摘要

A method embodiment for patterning a semiconductor device includes patterning a dummy layer over a hard mask to form one or more dummy lines. A sidewall aligned spacer is conformably formed over the one or more dummy lines and the hard mask. A first reverse material layer is formed over the sidewall aligned spacer. A first photoresist is formed and patterned over the first reverse material layer. The first reverse material layer using the first photoresist as a mask, wherein the sidewall aligned spacer is not etched. The one or more dummy lines are removed, and the hard mask is patterned using the sidewall aligned spacer and the first reverse material layer as a mask. A material used for forming the sidewall aligned spacer has a higher selectivity than a material used for forming the first reverse material layer.

主权项

1. A method comprising:
patterning a dummy layer over a mask layer to form one or more dummy lines; forming a spacer layer over top surfaces and sidewalls of the one or more dummy lines; forming a first reverse material layer over the spacer layer, wherein the spacer layer and the first reverse material layer comprise different materials; patterning the first reverse material layer, wherein patterning the first reverse material layer comprises etching the first reverse material layer at a faster rate than the spacer layer; removing the one or more dummy lines; and patterning the mask layer using the spacer layer and the first reverse material layer as a mask.