发明名称 SOI基板の作製方法
摘要 <P>PROBLEM TO BE SOLVED: To provide a suggestion for manufacturing method of a Silicon on Insulator (SOI) substrate, capable of sufficiently suppressing a defect such as air void caused in lamination of substrates. <P>SOLUTION: In a manufacturing method for a SOI substrate, at the time of or before starting the lamination of a bond substrate and a base substrate by applying pressure on the edge of the bond substrate or the base substrate being disposed to face each other, the bond substrate is warped so that the lamination ending point in the bond board is separated from the base substrate and/or the base substrate is warped so that the lamination ending position in the base substrate is separated from the bond substrate with respect to the tangential plane in the starting point of the lamination in a bond substrate surface or a base substrate surface. After the lamination is being started, speed related to the lamination of the bond substrate and the base substrate is controlled by controlling the warp quantity of the bond substrate and/or the warp quantity of the base substrate. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP5851113(B2) 申请公布日期 2016.02.03
申请号 JP20110097485 申请日期 2011.04.25
申请人 株式会社半導体エネルギー研究所 发明人 永井 雅晴;成田 明浩;森若 智昭;丸山 純矢
分类号 H01L21/02;H01L27/08;H01L27/12 主分类号 H01L21/02
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