发明名称 Programmable memory with restricted reprogrammability
摘要 <p>A reprogrammable electronic memory, comprising a logic device 13 having a plurality of inputs and an output 14 , wherein a signal at the output 14 changes each time a signal at one of the inputs changes; and a one-time programmable element 10,11,12 connected to each of the inputs, each element providing a first output signal prior to programming of that element and a second output signal after programming of that element. The output of the logic device therefore changes or toggles as the one time programmable element is programmed. The logic device may perform an XOR function between the inputs, and may further be a parity tree. At least one of the one-time programmable elements may be a fuse, an anti-fuse or a one-time programmable Flash cell. Preferably there are three inputs to the logic device and three one time programmable elements. The electronic memory may be implemented as an integrated circuit, whilst the logic device may be implemented in hardware or software. The reprogrammable electronic memory may be used to allow limited reprogramming of a non volatile memory device or to allow limited repeat device testing. In one embodiment the value of the memory is high immediately after manufacturing allowing testing. Post testing, the element is altered, the memory value goes low and test mode is denied. The second element may be altered (memory high), if the device is returned by a customer for repair or maintenance, allowing access to the test mode. The third element is then processed disabling test mode prior to return of the device.</p>
申请公布号 GB2505874(B) 申请公布日期 2016.02.03
申请号 GB20120015650 申请日期 2012.09.03
申请人 CAMBRIDGE SILICON RADIO LIMITED 发明人 MEL GERARD LONG
分类号 G11C17/16;G11C29/00;G11C29/56 主分类号 G11C17/16
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