发明名称 メモリデバイスにおけるパス分離
摘要 Embodiments of the present disclosure describe techniques and configurations for word-line path isolation in a phase change memory (PCM) device. In one embodiment, a memory device includes a memory cell of a memory device, a bit-line coupled to the memory cell, a word-line coupled to the memory cell, a bit-line electrode coupled to the bit-line, a word-line electrode coupled to the word-line, current-limiting circuitry of a selection module coupled to one of the word-line electrode and the bit-line electrode having a lower potential, the current-limiting circuitry to facilitate a selection operation of the memory cell by the selection module, sensing circuitry coupled to the one of the word-line electrode and the bit-line electrode having the lower potential, the sensing circuitry to perform a read operation of the memory cell, and write circuitry coupled to the one of the word-line electrode and the bit-line electrode having the lower potential, the write circuitry to perform a write operation of the memory cell. Other embodiments may be described and/or claimed.
申请公布号 JP5852741(B2) 申请公布日期 2016.02.03
申请号 JP20140529659 申请日期 2011.09.09
申请人 インテル・コーポレーション 发明人 カストロ、ヘルナン エー.
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
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