发明名称 Methods of manufacturing flip chip semiconductor packages using double-sided thermal compression bonding
摘要 Methods of producing a semiconductor package using dual-sided thermal compression bonding includes providing a substrate having an upper surface and a lower surface. A first device having a first surface and a second surface can be provided along with a second device having a third surface and a fourth surface. The first surface of the first device can be coupled to the upper surface of the substrate while the third surface of the second device can be coupled to the lower surface of the substrate, the coupling occurring simultaneously to produce the semiconductor package.
申请公布号 US9252130(B2) 申请公布日期 2016.02.02
申请号 US201313853810 申请日期 2013.03.29
申请人 STATS ChipPAC, Ltd. 发明人 Kim KyungMoon;Kim YoungChul;Lee HunTeak;Kang KeonTaek;Chi HeeJo
分类号 H01L25/065;H01L23/31;H01L23/00 主分类号 H01L25/065
代理机构 Patent Law Group: Atkins and Associates, P.C. 代理人 Atkins Robert D.;Patent Law Group: Atkins and Associates, P.C.
主权项 1. A method of making a semiconductor device, comprising: providing a substrate including an upper surface and a lower surface opposite the upper surface; providing a first semiconductor component including a first surface and a second surface opposite the first surface; forming a plurality of first bumps over the first surface of the first semiconductor component; forming a first non-conductive material over the first surface of the first semiconductor component around the plurality of first bumps; providing a second semiconductor component including a third surface and a fourth surface opposite the third surface; forming a plurality of second bumps over the third surface of the second semiconductor component; forming a second non-conductive material over the third surface of the second semiconductor component around the plurality of second bumps; heating the substrate; simultaneously mounting the first and second semiconductor components to the substrate after heating the substrate with the plurality of first bumps and first non-conductive material contacting the upper surface of the substrate and the plurality of second bumps and second non-conductive material contacting the lower surface of the substrate; and forming a plurality of interconnect structures over the lower surface of the substrate outside a footprint of the second semiconductor component.
地址 Singapore SG