发明名称 Command order re-sequencing in non-volatile memory
摘要 An apparatus includes a memory and storage circuitry. The storage circuitry is configured to receive at least one request causing execution of a sequence of memory commands in the memory, to identify that, although a first memory command appears in the sequence before a second memory command, the execution of the second memory command would improve a performance of the execution of the first memory command, and to execute the second memory command and then to execute the first memory command with the improved execution performance.
申请公布号 US9250814(B2) 申请公布日期 2016.02.02
申请号 US201313763928 申请日期 2013.02.11
申请人 Apple Inc. 发明人 Gurgi Eyal;Ish-Shalom Tomer
分类号 G06F13/00;G06F3/06;G06F13/16;G11C16/06 主分类号 G06F13/00
代理机构 Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C. 代理人 Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
主权项 1. A method, comprising: in a memory controller that controls a non-volatile memory, receiving at least one request causing execution of a sequence of memory read commands in the non-volatile memory, wherein the non-volatile memory includes a plurality of multi-level memory cells; identifying a first memory read command of the sequence of memory read commands that appears in the sequence of memory read commands after a second memory read command; executing the first memory read command, wherein executing the first memory read command includes reading a subset of the plurality of multi-level memory cells using a first plurality of read thresholds to generate first read results, wherein each memory cell of the subset of the plurality of multi-level memory cells is coupled to a common word line; calculating a second plurality of read thresholds dependent upon the first read results; and executing the second memory read command, wherein executing the second memory read command includes reading the subset of the plurality of memory cells using the second plurality of read thresholds to generate second read results.
地址 Cupertino CA US