发明名称 Multi-chip package and method of manufacturing the same
摘要 A multi-chip package may include a first semiconductor chip, a second semiconductor chip, a first stud bump, a first nail head bonding bump, a second stud bump, and a first conductive wire. The first semiconductor chip may have a first bonding pad. The second semiconductor chip may be stacked on the first semiconductor chip so the first bonding pad remains exposed. The second semiconductor chip may have a second bonding pad. The first stud bump may be formed on the first bonding pad. The first nail head bonding bump may be formed on the first stud bump, with one end of a first conductive wire formed between the two. The second stud bump may be formed on the second bonding pad, with another end of the first conductive wire formed between the two. An electrical connection test may be performed on each of the wire bonding processes.
申请公布号 US9252123(B2) 申请公布日期 2016.02.02
申请号 US201414505802 申请日期 2014.10.03
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 Han Won-Gil;Park Se-Yeoul;Jin Ho-Tae;Kim Byong-Joo;Lee Yong-Je;Park Han-Ki
分类号 H01L23/00;H01L21/66;H01L25/065;H01L25/00 主分类号 H01L23/00
代理机构 Muir Patent Law, PLLC 代理人 Muir Patent Law, PLLC
主权项 1. A method of manufacturing a multi-chip package, the method comprising: providing a package substrate including a plurality of substrate pads disposed on an upper surface of the package substrate, the substrate pads including at least a ground pad and at least a signal pad; stacking a first semiconductor chip on the package substrate, the first semiconductor chip including at least a first bonding pad disposed on an upper surface of the first semiconductor chip; stacking at least a second semiconductor chip on the first semiconductor chip such that the first bonding pad remains exposed, the second semiconductor chip including at least a second bonding pad disposed on an upper surface of the second semiconductor chip; forming a first stud bump on an upper surface of the first bonding pad; forming a first conductive wire to extend from a first ground pad of the plurality of substrate pads to an upper surface of the first stud bump; forming a first nail head bonding bump on the first stud bump and first conductive wire; and after the first semiconductor chip has been electrically connected to the first ground pad: forming a second stud bump on an upper surface of the second bonding pad; forming a second conductive wire extending from an upper surface of the first nail head bonding bump to the second stud bump; and testing an electrical connectivity of the first semiconductor chip, wherein the step of testing is perform after forming the first conductive wire and before forming the second stud bump.
地址 Samsung-ro, Yeongtong-gu, Suwon-si KR