发明名称 |
Partially-blocked well implant to improve diode ideality with SiGe anode |
摘要 |
A method of manufacturing a semiconductor device is disclosed. A p-type substrate is doped to form an N-well in a selected portion of a p-type substrate adjacent an anode region of the substrate. A p-type doped region is formed in the anode region of the p-type substrate. The p-type doped region and the N-well form a p-n junction. |
申请公布号 |
US9252234(B2) |
申请公布日期 |
2016.02.02 |
申请号 |
US201213605290 |
申请日期 |
2012.09.06 |
申请人 |
International Business Machines Corporation |
发明人 |
Guo Dechao;Haensch Wilfried E.;Wang Gan;Wang Yanfeng;Wang Xin |
分类号 |
H01L21/8238;H01L29/66;H01L29/739;H01L29/165;H01L21/425;H01L29/16 |
主分类号 |
H01L21/8238 |
代理机构 |
Cantor Colburn LLP |
代理人 |
Cantor Colburn LLP ;Alexanian Vazken |
主权项 |
1. A method of manufacturing a semiconductor device, comprising:
doping a p-type substrate to form an N-well from one portion of the p-type substrate adjacent an anode region from another portion of the p-type substrate, wherein an interface between the N-well and the anode extends vertically from a top surface of the p-type substrate to a bottom surface of the p-type substrate; etching a cavity to a selected depth in the anode region adjacent the N-well; depositing p-type doped material in the cavity to form a p-type doped region adjacent the N-well, wherein the interface between the N-well and the anode provides a sidewall boundary of the p-type material and a p-n junction associated with the p-type doped region extends into the N-well and into the anode region; and forming a gate stack on the N-well having a spacer, wherein an outer sidewall of the gate stack is aligned with the vertical interface between the N-well and the anode. |
地址 |
Armonk NY US |