Pulser logic method and system for an ultrasound beamformer

摘要

The pulser logic method and system for an ultrasound beamformer is based on using memory blocks instead of ordinary binary counters to accomplish transmit focusing of an ultrasound beam. This method reduces the use count of logic blocks (cost reduction) and facilitates the FPGA floor planner routing, increasing the design overall speed (performance enhancement). The exemplary design disclosed herein is for sixteen channels, but can be adjusted for any number of beamformer channels. The design may use, for example, a Xilinx Spartan-3 field programmable gate array (FPGA).

主权项

1. A pulser logic method for an ultrasound beamformer, comprising the steps of:
accessing digital logic memory blocks to establish a transducer element excitation timing sequence; delivering the transducer element excitation timing sequence to a pulse generator, the pulse generator exciting selective pulsers of a multi-element ultrasound array transducer according to the excitation timing sequence; using a delay memory block to store delay values in master clock number of cycles needed for each of the pulsers to begin emitting transmit pulses; and using a pulser trigger memory block having a bit data width corresponding to the number of pulsers in the multi-element ultrasound array transducer, the pulser trigger memory block triggering a corresponding one of the pulsers based on a delay timing associated with the delay memory block; wherein the multi-element ultrasound array transducer forms a wave front focal point having a steerable position determined by the transducer element excitation timing sequence.