Multiple beam transmission interferometric testing methods for the development and evaluation of subwavelength sized features within semiconductor and anisotropic devices

摘要

Improved methods and systems for inspection imaging for holographic or interferometric semiconductor test and evaluation through all phases of device development and manufacture. Specifically, systems and methods are disclosed for extending the range of optical holographic interferometric inspection for testing and evaluating microelectronic devices and determining the interplay of electromagnetic signals and dynamic stresses to the semiconductor material are provided in which an enhanced imaging method provides continuous and varying the magnification of the optical holographic interferometric images over a plurality of interleaved optical pathways and imaging devices. Analysis of one or more holographic interference patterns displays internal and external stresses and the various effects of such stresses upon the operating characteristics of features within the features, interior structures or within the internal surfaces of the semiconductor device at any stage of development or manufacture.

主权项

1. A method for developing and evaluating semiconductor or anisotropic devices or wafers for manufacture by optical interferometric testing and displaying internal stresses of semiconductor or anisotropic devices or wafers and for testing semiconductor or anisotropic devices or wafers while being manufactured, the device or wafer under test being comprised a semiconductor conductor or anisotropic material having an interior surface and interior structures, comprising:
using a holographic optical interference system with at least one light source, providing at least one light beam of coherent wavelength with a wavelength to which the semiconductor or anisotropic material is at least semi-transparent or transparent, splitting the light beam into a pair of beams, comprising a reference beam and an object beam, imposing and adjusting the polarization of the object beam on the exterior surface of the semiconductor or anisotropic material to generate a transmission object beam transmitted through the device under test having a polarization from the interior structures of the semiconductor or anisotropic material and interior surfaces of the semiconductor or anisotropic material to generate a transmitted polarized beam passing through the interior structures of the semiconductor or anisotropic material, adjusting at least one of the following attributes of the angle of incidence or polarization or the length of the converging or diverging optical pathway of the reference beam relative to the object beam between one or more angles with the semiconductor or anisotropic material being in one or more states for each angle of the reference beam, or adjusting at least one of said attributes of the transmitted object beam relative to the incident reference beam, imposing the transmitted object beam and the reference beam onto one or more detection devices to create a plurality of interference or interferometric patterns of the transmitted object beam with the incident reference beam, one interference or interferometric pattern at each of the plurality of angles of the reference beam, varying the magnification or optical pathway of the incident reference beam relative to the magnification of the object beam passing through the device, feature, or area under test, using one or more detection devices to physically record or digitally store the plurality of interference or interferometric patterns of one or more infrared or thermal wavelengths, comparing the plurality of interference or interferometric patterns to one another to determine or calculate and display stress or the effects of such stress and interior structure characteristics within the semiconductor or anisotropic material, device or wafer, and using the plurality of interference or interferometric patterns comprising of the interference of one or more differing infrared or thermal wavelengths to perform at least one of the following: (1) test, shape, calculate or determine semiconductor or anisotropic materials, devices, features, wafers or interior structures, (2) evaluate, monitor, or calculate internal processes in semiconductor or anisotropic materials, devices, features, or wafers, (3) test integrated circuits, devices, features, or materials, (4) determine or calculate the effects of electromagnetic signals that act upon or within the semiconductor or anisotropic wafers, dielectric materials, conductors, and within materials adjacent to, the feature, devices or processes, (5) determine or calculate at least one effect of energies or signals acting upon or within the semiconductor or anisotropic materials, dielectric materials, conductors, and within materials adjacent to, devices, features, or wafers, (6) monitor, evaluate, calculate or determine the effectiveness or efficiency of the processes or materials to create semiconductor or anisotropic materials, devices, features, wafers or interior structures, or (7) determine or calculate the effects of changes to process, configuration, or materials and identify or calculate at least one change that affects the semiconductor or anisotropic materials, devices, features, wafers or interior structures.