Providing metadata in a translation lookaside buffer (TLB)

摘要

In one embodiment, the present invention includes a translation lookaside buffer (TLB) to store entries each having a translation portion to store a virtual address (VA)-to-physical address (PA) translation and a second portion to store bits for a memory page associated with the VA-to-PA translation, where the bits indicate attributes of information in the memory page. Other embodiments are described and claimed.

主权项

1. A processor comprising:
a first core to execute instructions; a first translation lookaside buffer (TLB) to store a plurality of entries each having a first portion to store a virtual address (VA)-to-physical address (PA) translation and a second portion to store a plurality of bits for a memory page of a main memory associated with the VA-to-PA translation, the plurality of bits to indicate at least one attribute of information in the memory page, and a first bit of the plurality of bits to indicate whether a corresponding memory page has been initialized, wherein the first TLB is to set the first bit of the plurality of bits of a first entry to indicate that a first thread has initialized heap data and responsive to the set first bit one or more other threads can read the heap data; and a cache.