| 摘要 |
Method, algorithms, architectures, packages, circuits, and/or approaches for relatively low cost packaged integrated circuits (e.g., ball grid array or BGA packages) are disclosed. For example, a packaged integrated circuit can include a first chip, the first chip including a plurality of bond pads; a plurality of bond pad connectors in electrical communication with the plurality of bond pads; a substrate having a plurality of layers, at least one of the plurality of layers being configured to electrically connect the plurality of bond pad connectors and a plurality of external package connections; and a redistribution layer on the first chip, wherein the redistribution layer is configured to electrically connect at least one of the plurality of bond pad connectors and at least one of the plurality of bond pads on the first chip. |
| 主权项 |
1. A packaged integrated circuit comprising:
a substrate; a chip formed on the substrate, wherein the chip comprises a plurality of bond pads, wherein the plurality of bond pads includes (i) a first bond pad, (ii) a second bond pad, and (iii) a third bond pad, wherein each of the first bond pad, the second bond pad, and the third bond pad is formed on a single surface of the chip such that each of the first bond pad, the second bond pad, and the third bond pad is in physical contact with the single surface of the chip; a redistribution layer, wherein the redistribution layer has a first length, wherein substantially an entirety of the first length of the redistribution layer is formed on the single surface the chip, wherein a first end of the redistribution layer is physically attached to the first bond pad, wherein a second end of the redistribution layer is physically attached to the second bond pad, the redistribution layer to electrically couple (i) the first bond pad and (ii) the second bond pad; a first trace, wherein a substantial portion of the first trace is formed on the substrate such that the chip is not in between the substantial portion of the first trace and the substrate, the first trace to electrically couple (i) the second bond pad and (ii) the third bond pad; a first bond wire, wherein a first end of the first bond wire is physically attached to the first trace, and wherein a second end of the first bond wire is physically attached to the second bond pad; a second bond wire, wherein a first end of the second bond wire is physically attached to the first trace, and wherein a second end of the second bond wire is physically attached to the third bond pad; and a second trace formed on the substrate, wherein a first end of the second trace is electrically coupled to the first bond pad. |
