Test data reporting during memory testing

摘要

In some implementations, a built-in self-test (BIST) circuitry of a memory device is configured to perform an execution of a test sequence to test the memory device, wherein performing the execution comprises generating addresses of the memory device in accordance with the test sequence and advancing a value of a modulo counter as each of the addresses is generated, enable error logging when a generated address and a value of the modulo counter corresponding to the generated address match an address and a value of the modulo counter stored for a previously detected error, detect an error in data read from the memory device after enabling error logging, and store information associated with the detected error.

主权项

1. A method comprising:
performing, by memory testing circuitry, an execution of a test sequence to test a memory device, wherein performing the execution comprises generating addresses of the memory device in accordance with the test sequence and advancing a value of a modulo counter as each of the addresses is generated; enabling error logging when a generated address and a value of the modulo counter corresponding to the generated address match an address and a value of the modulo counter stored for a previously detected error; detecting an error in data read from the memory device after enabling error logging; and storing information associated with the detected error, wherein storing the information comprises storing an address generated for reading the data associated with the detected error from a location of the memory device and storing a value of the modulo counter corresponding to the address generated for reading the data.