发明名称 BANDGAP-ENGINEERED MEMORY INCLUDING A PLURALITY OF CHARGE TRAP LAYERS FOR STORING CHARGES
摘要 PROBLEM TO BE SOLVED: To provide a memory in which erase saturation is less likely to occur.SOLUTION: A memory cell includes a gate, a channel material having a channel surface and a channel valence band end, and a dielectric stack between the gate and channel surface. The dielectric stack includes a multilayer tunnel structure on the channel surface, a first charge storage nitride layer on the multilayer tunnel structure, a first blocking dielectric layer on the first charge storage nitride layer, a second charge storage nitride layer on the first blocking dielectric layer, and a second blocking oxide layer on the second charge storage nitride layer. The multilayer tunnel structure includes a first tunnel oxide layer, a first tunnel nitride layer on the first tunnel oxide layer, and a second tunnel oxide layer on the first tunnel nitride layer.SELECTED DRAWING: Figure 8
申请公布号 JP2016018805(A) 申请公布日期 2016.02.01
申请号 JP20140138717 申请日期 2014.07.04
申请人 MICRONICS INTERNATL CO LTD 发明人 LUE HANG-TING
分类号 H01L21/336;H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/336
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