发明名称 |
USING A DECREMENTER INTERRUPT TO START LONG-RUNNING HARDWARE OPERATIONS BEFORE THE END OF A SHARED PROCESSOR DISPATCH CYCLE |
摘要 |
Method to perform an operation, the operation comprising processing a first logical partition on a shared processor for the duration of a dispatch cycle, issuing, by a hypervisor, at a predefined time prior to completion of the dispatch cycle, a lightweight hypervisor decrementer (HDEC) interrupt specifying a cache line address buffer location in a virtual processor, and responsive to the lightweight HDEC, writing, by the shared processor, a set of cache line addresses used by the first logical partition to the cache line address buffer location in the virtual processor. |
申请公布号 |
US2016026573(A1) |
申请公布日期 |
2016.01.28 |
申请号 |
US201414502510 |
申请日期 |
2014.09.30 |
申请人 |
International Business Machines Corporation |
发明人 |
JACOBS Stuart Z.;LARSON David A.;VANCE Michael J. |
分类号 |
G06F12/08;G06F13/24;G06F9/455 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
1. A method, comprising:
processing a first logical partition on a shared processor for the duration of a dispatch cycle; issuing, by a hypervisor, at a predefined time prior to completion of the dispatch cycle, a lightweight hypervisor decrementer (HDEC) interrupt specifying a cache line address buffer location in a virtual processor; and responsive to the lightweight HDEC, writing, by the shared processor, a set of cache line addresses used by the first logical partition to the cache line address buffer location in the virtual processor. |
地址 |
Armonk NY US |