发明名称 RESET SUPERVISOR
摘要 Multiple processor systems are provided. A first processor is configured to monitor the state of at least one other processor by comparing received signals. When the first processor determines that another processor needs to be reset, the first processor provides a reset signal to a reset pin of the processor that needs to be reset. The first processor may reset itself after providing the reset signal.
申请公布号 US2016026225(A1) 申请公布日期 2016.01.28
申请号 US201514873455 申请日期 2015.10.02
申请人 NIKE, Inc. 发明人 Bielman James;Cummings Kate;Lowe, JR. Edward Stephen
分类号 G06F1/24;G06F9/44;G06F9/445;G06F13/38 主分类号 G06F1/24
代理机构 代理人
主权项 1. A device comprising: a first processor and a second processor each configured to receive an input signal; wherein the first processor is configured to process the input signal to generate an output signal and transmit the output signal to the second processor; wherein the second processor is configured to (i) compare the input signal to the output signal to determine whether the input signal corresponds to the output signal, and(ii) transmit a reset signal to the first processor in response to determining that the input signal does not correspond to the output signal; and wherein the first processor is further configured to load firmware in response to receiving the reset signal.
地址 Beaverton OR US