SILICON CARBIDE SEMICONDUCTOR DEVICE

摘要

There is provided a silicon carbide semiconductor device allowing for suppression of breakage of an element upon short circuit of load. A MOSFET includes a silicon carbide layer, a gate insulating film, a gate electrode, a source electrode, and a drain electrode. The silicon carbide layer includes a drift region, a body region, and a source region. The MOSFET is configured such that a relational expression of n<−0.02RonA+0.7 is established in a case where a contact width of the source region and the source electrode is represented by n (μm) in a cross section in a thickness direction of the silicon carbide layer and a migration direction of carriers in the body region and where on resistance of the MOSFET in a state in which an inversion layer is formed in a channel region is represented by RonA (mΩcm2).

主权项

1. A silicon carbide semiconductor device comprising:
a silicon carbide layer including a first main surface and a second main surface opposite to said first main surface,
said silicon carbide layer including
a first impurity region that has a first conductivity type,a second impurity region that is in contact with said first impurity region and that has a second conductivity type different from said first conductivity type, anda third impurity region that constitutes a portion of said first main surface, that is formed to interpose said second impurity region between said third impurity region and said first impurity region, and that has said first conductivity type; a gate insulating film formed on said second impurity region; a gate electrode formed on said gate insulating film; a first electrode that is in contact with said third impurity region in said first main surface and that is electrically connected to said third impurity region; and a second electrode that is formed on said second main surface and that is electrically connected to said silicon carbide layer, the silicon carbide semiconductor device being configured such that migration of carriers between said first electrode and said second electrode is controlled by controlling a voltage applied to said gate electrode, the silicon carbide semiconductor device being configured such that a relational expression of n<−0.02RonA+0.7 is established in a case where a contact width of said third impurity region and said first electrode is represented by n (μm) in a cross section in a thickness direction of said silicon carbide layer and a migration direction of said carriers in said second impurity region and where on resistance of said silicon carbide semiconductor device in an on state is represented by RonA (mΩ cm2).