发明名称 |
PARALLEL INTERFACE AND INTEGRATED CIRCUIT |
摘要 |
A parallel interface is disclosed. The parallel interface of the present disclosure includes an input unit configured to input, in parallel, a plurality of predetermined data signals and a clock signal; an output unit configured to output, in parallel, the predetermined data signals in synchronization with the clock signal; and a plurality of transmission lines disposed between the input unit and the output unit and configured to transmit, in parallel, the predetermined data signals and the clock signal, wherein the transmission lines are configured with a wiring pattern in which the transmission lines have different electrical lengths and an equal electrical capacitance. |
申请公布号 |
US2016028408(A1) |
申请公布日期 |
2016.01.28 |
申请号 |
US201514805538 |
申请日期 |
2015.07.22 |
申请人 |
Rohm Co., Ltd. |
发明人 |
SHIOMI Kazuma;YAMAMOTO Takateru |
分类号 |
H03L7/00;H03K19/0175 |
主分类号 |
H03L7/00 |
代理机构 |
|
代理人 |
|
主权项 |
1. A parallel interface comprising:
an input unit configured to input, in parallel, a plurality of predetermined data signals and a clock signal; an output unit configured to output, in parallel, the predetermined data signals in synchronization with the clock signal; and a plurality of transmission lines disposed between the input unit and the output unit and configured to transmit, in parallel, the predetermined data signals and the clock signal, wherein the transmission lines are configured with a wiring pattern in which the transmission lines have different electrical lengths and an equal electrical capacitance. |
地址 |
Kyoto JP |