SEMICONDUCTOR DEVICE

摘要

This invention provides a multi-pin semiconductor device as a low-cost flip-chip BGA. In the flip-chip BGA, a plurality of signal bonding electrodes in a peripheral area of the upper surface of a multilayer wiring substrate are separated into inner and outer ones and a plurality of signal through holes coupled to a plurality of signal wirings drawn inside are located between a plurality of rows of signal bonding electrodes and a central region where a plurality of bonding electrodes for core power supply are located so that the chip pad pitch can be decreased and the cost of the BGA can be reduced without an increase in the number of layers in the multilayer wiring substrate.

主权项

1. A semiconductor device comprising:
a wiring substrate having a first insulating layer, the first insulating layer has a first main surface and a second main surface opposite the first main surface, a plurality of through-holes which penetrate the first main surface to the second main surface of the first insulating layer are formed, a plurality of wirings are formed over the first main surface of the first insulating layer and electrically connect to the plurality of through-holes, respectively, a solder resist layer is formed over the first main surface of the first insulating layer such that the solder resist layer covers a part arranged on the first main surface of each of the plurality of through-holes; and a semiconductor chip having an obverse surface over which a plurality of bump electrodes are formed and a reverse surface opposite the obverse surface and mounted over the first main surface of the first insulating layer of the wiring substrate such that the obverse surface thereof faces to the first main surface of the first insulating layer of the wiring substrate, wherein a plurality of openings are formed in the solder resist layer such that apart of each of the plurality of wirings is exposed from each of the plurality of openings, and therefore, the part exposed from each of the plurality of openings of the plurality of wirings is provided as an electrode terminal, wherein each of the plurality of bump electrodes of the semiconductor chip is electrically connected to each of the plurality of electrode terminals, wherein, in a first main surface view of the first insulating layer of the wiring board, a plurality of first electrode terminals are arranged at a first area of the first main surface in a matrix formation, wherein, in a first main surface view of the first insulating layer of the wiring board, a plurality of second electrode terminals are arranged at a second area which surrounds the first area of the first main surface, and wherein, in a first main surface view of the first insulating layer of the wiring board, a center distance of two electrodes among the plurality of second electrode terminals is narrower than a center distance of two electrode terminals among the plurality of first electrode terminals in at least one direction.