发明名称 METHOD AND APPARATUS FOR IMPLEMENTING CLOCK HOLDOVER
摘要 The embodiments disclose a method and apparatus for implementing the clock holdover in the communication system. The apparatus receives an external source clock and outputs an output clock, and comprises a first phase-locked circuit and a second phase-locked circuit. The first phase-locked circuit is configured for taking the external source clock and a first output clock as input and outputting an intermediate clock, the first output clock is outputted by the second phase-locked circuit and fed back to the first phase-locked circuit. The first phase-locked circuit includes a first digital oscillator, and the first digital oscillator is configured to take the first output clock as a working clock to generate the intermediate clock. The second phase-locked circuit is configured for taking the intermediate clock and a local clock fed by a local oscillator as input, and outputting a second output clock.
申请公布号 EP2976851(A1) 申请公布日期 2016.01.27
申请号 EP20130878651 申请日期 2013.03.21
申请人 TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) 发明人 ZHU, KAI
分类号 H04L7/00;H03L7/22 主分类号 H04L7/00
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