Through-vias for wiring layers of semiconductor devices

摘要

Through-via structures and methods of their formation are disclosed. In one such method, a first etch through at least a first dielectric material of a wiring layer is performed such that a first hole outlining a collar structure for the through-via is formed. In addition, a stress-abating dielectric material is deposited in the hole such that the stress-abating dielectric material is disposed at least laterally from the first dielectric material. Further, a second etching through at least a semiconductor material of a semiconductor layer that is disposed below the wiring layer is performed, where the second etching forms a via hole in the semiconductor material. Additionally, at least a portion of the via hole is filled with conductive material to form the through-via such that the stress-abating dielectric material, at least in the wiring layer, provides a buffer between the conductive material and the first dielectric material.

主权项

1. A method for forming a through-via in a semiconductor device comprising:
performing a first etching through at least a first dielectric material of a wiring layer of the semiconductor device to expose a semiconductor material of a semiconductor layer below said wiring layer, said first etching forming a first hole outlining a collar structure for the through-via; depositing a porous stress-abating dielectric material in the first hole such that the stress-abating dielectric material forms the collar structure and extends between the semiconductor layer to a top surface of the wiring layer; performing a second etching through at least the semiconductor layer, said second etching forming a via hole in the semiconductor material; and filling at least a portion of said via hole with conductive material to form the through-via such that said stress-abating dielectric material, at least in said wiring layer, provides a buffer between said conductive material and said first dielectric material.