Semiconductor device and method of manufacturing semiconductor device

摘要

A semiconductor device having a high degree of freedom of layout has a first part AR1, in which a plurality of p-type wells PW and n-type wells NW are alternately arranged to be adjacent to each other along an X-axis direction. A common power feeding region (ARP2) for the plurality of wells PW is arranged on one side so as to interpose the AR1 in a Y-axis direction, and a common power feeding region (ARN2) for the plurality of wells NW is arranged on the other side. In the power feeding region (ARP2) for the PW wells, a p+-type power-feeding diffusion layer P+(DFW) having an elongate shape extending in the X-axis direction is formed. A plurality of gate layers GT extending in the X-axis direction to cross the boundary between the PW and NW wells are arranged in the AR1, and a plurality of MIS transistors are correspondingly formed.

主权项

1. A semiconductor device comprising:
a first well region of a first conductivity type including a first part to a third part; a first power feeding region of the first conductivity type having a higher impurity concentration than an impurity concentration of the first well region; and a second well region of a second conductivity type including a fourth part, wherein the first part and the second part are arranged to be adjacent to both sides of the fourth part in a first direction, the third part has a shape extending in the first direction, and is arranged to be joined to the first part and the second part and be adjacent to the fourth part in a second direction intersecting with the first direction, the first power feeding region is formed in a substantially rectangular shape in the third part, and supplies a predetermined voltage to the first part and the second part via the first well region, and a size of the first power feeding region in the first direction is larger than a size of the first power feeding region in the second direction.