Compact low-power fully digital CMOS clock generation apparatus for high-speed SerDes

摘要

A high-speed clock generator device includes a phase-interpolator (PI) circuit, a smoothing block, and inverter-based low-pass filters. The PI circuit receives a multiple clock signals with different phase angles and generates an output clock signal having a correct phase angle. The smoothing block smooths the clock signals with different phase angles and generates a number of smooth clock signals featuring improved linearity. The inverter-based low-pass filters filter harmonics of the clock signals with different phase angles.

主权项

1. A high-speed clock generator device, the device comprising:
a phase-interpolator (PI) circuit configured to receive a plurality of clock signals with different phase angles and to generate an output clock signal having a correct phase angle; a smoothing block configured to smooth the plurality of clock signals with different phase angles and to generate a plurality of smooth clock signals featuring improved linearity; and inverter-based low-pass filters configured to filter harmonics of the plurality of clock signals with different phase angles.