Battery charging circuit with serial connection of MOSFET and an enhancement mode JFET configured as reverse blocking diode with low forward voltage drop

摘要

A semiconductor die with integrated MOSFET and diode-connected enhancement mode JFET is disclosed. The MOSFET-JFET die includes common semiconductor substrate region (CSSR) of type-1 conductivity. A MOSFET device and a diode-connected enhancement mode JFET (DCE-JFET) device are located upon CSSR. The DCE-JFET device has the CSSR as its DCE-JFET drain. At least two DCE-JFET gate regions of type-2 conductivity located upon the DCE-JFET drain and laterally separated from each other with a DCE-JFET gate spacing. At least a DCE-JFET source of type-1 conductivity located upon the CSSR and between the DCE-JFET gates. A top DCE-JFET electrode, located atop and in contact with the DCE-JFET gate regions and DCE-JFET source regions. When properly configured, the DCE-JFET simultaneously exhibits a forward voltage Vf substantially lower than that of a PN junction diode while the reverse leakage current can be made comparable to that of a PN junction diode.

主权项

1. A battery charging circuit comprising:
a battery having a first battery terminal and a second battery terminal; a battery charging source having a first charging terminal and a second charging terminal with the first charging terminal connected to the first battery terminal; a serial connection of a MOSFET and an enhancement mode JFET for bridging the second charging terminal to the second battery terminal, wherein the enhancement mode JFET is configured with its JFET source shorted to its JFET gate thus functions as a reverse blocking diode having a low forward voltage drop.